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Showing posts with the label R-S Latch

R-S Latch

R-S latch R-S Latch Latchs is a basic building element in sequential circuits. Latches do not have clock signal, that is, they are asynchronous sequential circuits Latches are made up of static gates and are bi-stable i.e. it has two stable states and can switch between these states. Latches will have a feedback path from the output. Thus they change their output at any instant using the previous and present states of the signals R-S latch bloack diagram Where S=SET Input R=RESET Input Q=Output Qbar=Complemented Output RS latch implemented using NOR gates and we can store either a 0 ar a 1 in this circuit depending upon the vlaue of R and S When R=0, S=0 we don't have a change in the output in the circuit. Hence Q and Qbar remains in the pre...